<?xml version="1.0" encoding="UTF-8"?>
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          <spirit:name>PROTOCOL</spirit:name>
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          <spirit:name>ID_WIDTH</spirit:name>
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          <spirit:name>ADDR_WIDTH</spirit:name>
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              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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          <spirit:name>RUSER_WIDTH</spirit:name>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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          <spirit:name>BUSER_WIDTH</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.BUSER_WIDTH">0</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>READ_WRITE_MODE</spirit:name>
          <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.READ_WRITE_MODE">READ_WRITE</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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          <spirit:name>HAS_BURST</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.HAS_BURST">0</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>HAS_LOCK</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.HAS_LOCK">0</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>HAS_PROT</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.HAS_PROT">0</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>HAS_CACHE</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.HAS_CACHE">0</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>HAS_QOS</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.HAS_QOS">0</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>HAS_REGION</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.HAS_REGION">0</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>HAS_WSTRB</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.HAS_WSTRB">1</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>HAS_BRESP</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.HAS_BRESP">1</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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          </spirit:vendorExtensions>
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        <spirit:parameter>
          <spirit:name>HAS_RRESP</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.HAS_RRESP">1</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.SUPPORTS_NARROW_BURST">0</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.NUM_READ_OUTSTANDING">2</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_OUTSTANDING">2</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>MAX_BURST_LENGTH</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.MAX_BURST_LENGTH">1</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>PHASE</spirit:name>
          <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.PHASE">0.0</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>CLK_DOMAIN</spirit:name>
          <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.CLK_DOMAIN">/clk_wiz_0_clk_out1</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>NUM_READ_THREADS</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.NUM_READ_THREADS">1</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>NUM_WRITE_THREADS</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_THREADS">1</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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          <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI.WUSER_BITS_PER_BYTE">0</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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          <spirit:name>INSERT_VIP</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI.INSERT_VIP">0</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
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      <spirit:name>ACLK</spirit:name>
      <spirit:displayName>aclk</spirit:displayName>
      <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
      <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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            <spirit:name>CLK</spirit:name>
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          <spirit:physicalPort>
            <spirit:name>s_axi_aclk</spirit:name>
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        <spirit:parameter>
          <spirit:name>ASSOCIATED_BUSIF</spirit:name>
          <spirit:value spirit:id="BUSIFPARAM_VALUE.ACLK.ASSOCIATED_BUSIF">S_AXI</spirit:value>
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        <spirit:parameter>
          <spirit:name>ASSOCIATED_RESET</spirit:name>
          <spirit:value spirit:id="BUSIFPARAM_VALUE.ACLK.ASSOCIATED_RESET">s_axi_aresetn</spirit:value>
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        <spirit:parameter>
          <spirit:name>FREQ_HZ</spirit:name>
          <spirit:displayName>clock frequency</spirit:displayName>
          <spirit:description>specify frequency of the clock connected to port s_axi_aclk</spirit:description>
          <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.ACLK.FREQ_HZ">100000000</spirit:value>
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        <spirit:parameter>
          <spirit:name>FREQ_TOLERANCE_HZ</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.ACLK.FREQ_TOLERANCE_HZ">0</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>PHASE</spirit:name>
          <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.ACLK.PHASE">0.0</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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          </spirit:vendorExtensions>
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        <spirit:parameter>
          <spirit:name>CLK_DOMAIN</spirit:name>
          <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.ACLK.CLK_DOMAIN">/clk_wiz_0_clk_out1</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>ASSOCIATED_PORT</spirit:name>
          <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.ACLK.ASSOCIATED_PORT"/>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
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        <spirit:parameter>
          <spirit:name>INSERT_VIP</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.ACLK.INSERT_VIP">0</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
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      <spirit:name>ARESETN</spirit:name>
      <spirit:displayName>aresetn</spirit:displayName>
      <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
      <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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            <spirit:name>RST</spirit:name>
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          <spirit:physicalPort>
            <spirit:name>s_axi_aresetn</spirit:name>
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          <spirit:name>POLARITY</spirit:name>
          <spirit:value spirit:id="BUSIFPARAM_VALUE.ARESETN.POLARITY">ACTIVE_LOW</spirit:value>
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        <spirit:parameter>
          <spirit:name>INSERT_VIP</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.ARESETN.INSERT_VIP">0</spirit:value>
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            <xilinx:parameterInfo>
              <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
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      <spirit:name>INTERRUPT</spirit:name>
      <spirit:displayName>interrupt</spirit:displayName>
      <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
      <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
      <spirit:master/>
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          <spirit:logicalPort>
            <spirit:name>INTERRUPT</spirit:name>
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          <spirit:physicalPort>
            <spirit:name>interrupt</spirit:name>
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      </spirit:portMaps>
      <spirit:parameters>
        <spirit:parameter>
          <spirit:name>SENSITIVITY</spirit:name>
          <spirit:value spirit:id="BUSIFPARAM_VALUE.INTERRUPT.SENSITIVITY">EDGE_RISING</spirit:value>
        </spirit:parameter>
        <spirit:parameter>
          <spirit:name>PortWidth</spirit:name>
          <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.INTERRUPT.PortWidth">1</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:parameterUsage>none</xilinx:parameterUsage>
            </xilinx:parameterInfo>
          </spirit:vendorExtensions>
        </spirit:parameter>
      </spirit:parameters>
    </spirit:busInterface>
    <spirit:busInterface>
      <spirit:name>UART</spirit:name>
      <spirit:displayName>uart</spirit:displayName>
      <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="uart" spirit:version="1.0"/>
      <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="uart_rtl" spirit:version="1.0"/>
      <spirit:master/>
      <spirit:portMaps>
        <spirit:portMap>
          <spirit:logicalPort>
            <spirit:name>RxD</spirit:name>
          </spirit:logicalPort>
          <spirit:physicalPort>
            <spirit:name>rx</spirit:name>
          </spirit:physicalPort>
        </spirit:portMap>
        <spirit:portMap>
          <spirit:logicalPort>
            <spirit:name>TxD</spirit:name>
          </spirit:logicalPort>
          <spirit:physicalPort>
            <spirit:name>tx</spirit:name>
          </spirit:physicalPort>
        </spirit:portMap>
      </spirit:portMaps>
      <spirit:parameters>
        <spirit:parameter>
          <spirit:name>BOARD.ASSOCIATED_PARAM</spirit:name>
          <spirit:value spirit:id="BUSIFPARAM_VALUE.UART.BOARD.ASSOCIATED_PARAM">UARTLITE_BOARD_INTERFACE</spirit:value>
          <spirit:vendorExtensions>
            <xilinx:parameterInfo>
              <xilinx:enablement>
                <xilinx:presence>required</xilinx:presence>
              </xilinx:enablement>
            </xilinx:parameterInfo>
          </spirit:vendorExtensions>
        </spirit:parameter>
      </spirit:parameters>
    </spirit:busInterface>
  </spirit:busInterfaces>
  <spirit:memoryMaps>
    <spirit:memoryMap>
      <spirit:name>S_AXI</spirit:name>
      <spirit:displayName>S_AXI_MEM</spirit:displayName>
      <spirit:description>Memory Map for S_AXI</spirit:description>
      <spirit:addressBlock>
        <spirit:name>Reg</spirit:name>
        <spirit:displayName>Reg</spirit:displayName>
        <spirit:description>Register Block</spirit:description>
        <spirit:baseAddress spirit:format="long">0</spirit:baseAddress>
        <spirit:range spirit:format="long">4096</spirit:range>
        <spirit:width spirit:format="long">32</spirit:width>
        <spirit:usage>register</spirit:usage>
        <spirit:access>read-write</spirit:access>
        <spirit:register>
          <spirit:name>RX_FIFO</spirit:name>
          <spirit:displayName>RX FIFO</spirit:displayName>
          <spirit:description>Receive data FIFO</spirit:description>
          <spirit:addressOffset>0x0</spirit:addressOffset>
          <spirit:size spirit:format="long">32</spirit:size>
          <spirit:volatile>true</spirit:volatile>
          <spirit:access>read-only</spirit:access>
          <spirit:reset>
            <spirit:value spirit:format="long">0x0</spirit:value>
          </spirit:reset>
          <spirit:field>
            <spirit:name>RX_DATA</spirit:name>
            <spirit:displayName>Receive Data</spirit:displayName>
            <spirit:description>UART Receive Data
</spirit:description>
            <spirit:bitOffset>0</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_DATA_BITS&apos;)))">8</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>read-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
        </spirit:register>
        <spirit:register>
          <spirit:name>TX_FIFO</spirit:name>
          <spirit:displayName>TX FIFO</spirit:displayName>
          <spirit:description>Transmit data FIFO</spirit:description>
          <spirit:addressOffset>0x4</spirit:addressOffset>
          <spirit:size spirit:format="long">32</spirit:size>
          <spirit:volatile>true</spirit:volatile>
          <spirit:access>write-only</spirit:access>
          <spirit:reset>
            <spirit:value spirit:format="long">0x0</spirit:value>
          </spirit:reset>
          <spirit:field>
            <spirit:name>TX_DATA</spirit:name>
            <spirit:displayName>Transmit Data</spirit:displayName>
            <spirit:description>UART Transmit Data
</spirit:description>
            <spirit:bitOffset>0</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_DATA_BITS&apos;)))">8</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>write-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
        </spirit:register>
        <spirit:register>
          <spirit:name>CTRL_REG</spirit:name>
          <spirit:displayName>Control Register</spirit:displayName>
          <spirit:description>UART Lite control register</spirit:description>
          <spirit:addressOffset>0xC</spirit:addressOffset>
          <spirit:size spirit:format="long">32</spirit:size>
          <spirit:volatile>true</spirit:volatile>
          <spirit:access>write-only</spirit:access>
          <spirit:reset>
            <spirit:value spirit:format="long">0x0</spirit:value>
          </spirit:reset>
          <spirit:field>
            <spirit:name>RST_TXFIFO</spirit:name>
            <spirit:displayName>Reset Tx FIFO</spirit:displayName>
            <spirit:description>Reset/clear the transmit FIFO
Writing a 1 to this bit position clears the transmit FIFO
  0 - Do nothing
  1 - Clear the transmit FIFO
</spirit:description>
            <spirit:bitOffset>0</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>write-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
          <spirit:field>
            <spirit:name>RST_RXFIFO</spirit:name>
            <spirit:displayName>Reset Rx FIFO</spirit:displayName>
            <spirit:description>Reset/clear the receive FIFO
Writing a 1 to this bit position clears the receive FIFO
  0 - Do nothing
  1 - Clear the receive FIFO
</spirit:description>
            <spirit:bitOffset>1</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>write-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
          <spirit:field>
            <spirit:name>Enable_Intr</spirit:name>
            <spirit:displayName>Enable interrupt</spirit:displayName>
            <spirit:description>Enable interrupt for the AXI UART Lite
  0 - Disable interrupt signal
  1 - Enable interrupt signal
</spirit:description>
            <spirit:bitOffset>4</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>write-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
        </spirit:register>
        <spirit:register>
          <spirit:name>STAT_REG</spirit:name>
          <spirit:displayName>Status Register</spirit:displayName>
          <spirit:description>UART Lite status register</spirit:description>
          <spirit:addressOffset>0x8</spirit:addressOffset>
          <spirit:size spirit:format="long">32</spirit:size>
          <spirit:volatile>true</spirit:volatile>
          <spirit:access>read-only</spirit:access>
          <spirit:reset>
            <spirit:value spirit:format="long">0x0</spirit:value>
          </spirit:reset>
          <spirit:field>
            <spirit:name>RX_FIFO_Valid_Data</spirit:name>
            <spirit:displayName>RX FIFO Valid Data</spirit:displayName>
            <spirit:description>Indicates if the receive FIFO has data.
  0 - Receive FIFO is empty
  1 - Receive FIFO has data
</spirit:description>
            <spirit:bitOffset>0</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>read-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
          <spirit:field>
            <spirit:name>RX_FIFO_Full</spirit:name>
            <spirit:displayName>RX FIFO Full</spirit:displayName>
            <spirit:description>Indicates if the receive FIFO is full.
  0 - Receive FIFO is not full
  1 - Receive FIFO is full
</spirit:description>
            <spirit:bitOffset>1</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>read-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
          <spirit:field>
            <spirit:name>TX_FIFO_Empty</spirit:name>
            <spirit:displayName>TX FIFO Empty</spirit:displayName>
            <spirit:description>Indicates if the transmit FIFO is empty.
  0 - Transmit FIFO is not empty
  1 - Transmit FIFO is empty
</spirit:description>
            <spirit:bitOffset>2</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>read-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
          <spirit:field>
            <spirit:name>TX_FIFO_Full</spirit:name>
            <spirit:displayName>TX FIFO Full</spirit:displayName>
            <spirit:description>Indicates if the transmit FIFO is full.
  0 - Transmit FIFO is not full
  1 - Transmit FIFO is full
</spirit:description>
            <spirit:bitOffset>3</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>read-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
          <spirit:field>
            <spirit:name>Intr_Enabled</spirit:name>
            <spirit:displayName>Interrupt Enabled</spirit:displayName>
            <spirit:description>Indicates that interrupts is enabled.
  0 - Interrupt is disabled
  1 - Interrupt is enabled
</spirit:description>
            <spirit:bitOffset>4</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>read-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
          <spirit:field>
            <spirit:name>Overrun_Error</spirit:name>
            <spirit:displayName>Overrun Error</spirit:displayName>
            <spirit:description>Indicates that a overrun error has occurred after the last time the status register was read. Overrun is when a new character has been received but the receive FIFO is full. The received character is ignored and not written into the receive FIFO. This bit is cleared when the status register is read.      0 - No overrun error has occurred      1 - Overrun error has occurred
</spirit:description>
            <spirit:bitOffset>5</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>read-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
          <spirit:field>
            <spirit:name>Frame_Error</spirit:name>
            <spirit:displayName>Frame Error</spirit:displayName>
            <spirit:description>Indicates that a frame error has occurred after the last time the status register was read. Frame error is defined as detection of a stop bit with the value 0. The receive character is ignored and not written to the receive FIFO. This bit is cleared when the status register is read.      0 - No frame error has occurred   1 - Frame error has occurred
</spirit:description>
            <spirit:bitOffset>6</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>read-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
          <spirit:field>
            <spirit:name>Parity_Error</spirit:name>
            <spirit:displayName>Parity Error</spirit:displayName>
            <spirit:description>Indicates that a parity error has occurred after the last time the status register was read. If the UART is configured without any parity handling, this bit is always 0. The received character is written into the receive FIFO. This bit is cleared when the status register is read.      0 - No parity error has occurred      1 - Parity error has occurred
</spirit:description>
            <spirit:bitOffset>7</spirit:bitOffset>
            <spirit:bitWidth spirit:format="long">1</spirit:bitWidth>
            <spirit:volatile>true</spirit:volatile>
            <spirit:access>read-only</spirit:access>
            <spirit:writeValueConstraint>
              <spirit:minimum>0</spirit:minimum>
              <spirit:maximum>0</spirit:maximum>
            </spirit:writeValueConstraint>
            <spirit:testable spirit:testConstraint="unconstrained">false</spirit:testable>
          </spirit:field>
        </spirit:register>
      </spirit:addressBlock>
    </spirit:memoryMap>
  </spirit:memoryMaps>
  <spirit:model>
    <spirit:ports>
      <spirit:port>
        <spirit:name>s_axi_aclk</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="1">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_aresetn</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="bitString" spirit:bitStringLength="1">1</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>interrupt</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_awaddr</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:vector>
            <spirit:left spirit:format="long">3</spirit:left>
            <spirit:right spirit:format="long">0</spirit:right>
          </spirit:vector>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic_vector</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="32">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_awvalid</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="1">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_awready</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_wdata</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:vector>
            <spirit:left spirit:format="long">31</spirit:left>
            <spirit:right spirit:format="long">0</spirit:right>
          </spirit:vector>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic_vector</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="32">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_wstrb</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:vector>
            <spirit:left spirit:format="long">3</spirit:left>
            <spirit:right spirit:format="long">0</spirit:right>
          </spirit:vector>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic_vector</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="4">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_wvalid</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="1">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_wready</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_bresp</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:vector>
            <spirit:left spirit:format="long">1</spirit:left>
            <spirit:right spirit:format="long">0</spirit:right>
          </spirit:vector>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic_vector</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_bvalid</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_bready</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="1">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_araddr</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:vector>
            <spirit:left spirit:format="long">3</spirit:left>
            <spirit:right spirit:format="long">0</spirit:right>
          </spirit:vector>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic_vector</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="32">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_arvalid</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="1">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_arready</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_rdata</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:vector>
            <spirit:left spirit:format="long">31</spirit:left>
            <spirit:right spirit:format="long">0</spirit:right>
          </spirit:vector>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic_vector</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_rresp</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:vector>
            <spirit:left spirit:format="long">1</spirit:left>
            <spirit:right spirit:format="long">0</spirit:right>
          </spirit:vector>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic_vector</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_rvalid</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>s_axi_rready</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="1">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>rx</spirit:name>
        <spirit:wire>
          <spirit:direction>in</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
          <spirit:driver>
            <spirit:defaultValue spirit:format="long" spirit:bitStringLength="1">0</spirit:defaultValue>
          </spirit:driver>
        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>tx</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
              <spirit:viewNameRef>dummy_view</spirit:viewNameRef>
            </spirit:wireTypeDef>
          </spirit:wireTypeDefs>
        </spirit:wire>
      </spirit:port>
    </spirit:ports>
    <spirit:modelParameters>
      <spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="string">
        <spirit:name>C_FAMILY</spirit:name>
        <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_FAMILY">kintex7</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_S_AXI_ACLK_FREQ_HZ</spirit:name>
        <spirit:displayName>AXI CLK Frequency</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_S_AXI_ACLK_FREQ_HZ">100000000</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_S_AXI_ADDR_WIDTH</spirit:name>
        <spirit:displayName>C S Axi Addr Width</spirit:displayName>
        <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_S_AXI_ADDR_WIDTH">4</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_S_AXI_DATA_WIDTH</spirit:name>
        <spirit:displayName>Axi Data Width</spirit:displayName>
        <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_S_AXI_DATA_WIDTH">32</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_BAUDRATE</spirit:name>
        <spirit:displayName>Baudrate</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_BAUDRATE">115200</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_DATA_BITS</spirit:name>
        <spirit:displayName>Data Bits</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_DATA_BITS" spirit:minimum="5" spirit:maximum="8" spirit:rangeType="long">8</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_USE_PARITY</spirit:name>
        <spirit:displayName>Use Parity</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_USE_PARITY" spirit:minimum="0" spirit:maximum="1" spirit:rangeType="long">0</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_ODD_PARITY</spirit:name>
        <spirit:displayName>Odd Parity</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_ODD_PARITY" spirit:minimum="0" spirit:maximum="1" spirit:rangeType="long">0</spirit:value>
      </spirit:modelParameter>
    </spirit:modelParameters>
  </spirit:model>
  <spirit:choices>
    <spirit:choice>
      <spirit:name>choice_list_3bbfa9f1</spirit:name>
      <spirit:enumeration>No_Parity</spirit:enumeration>
      <spirit:enumeration>Odd</spirit:enumeration>
      <spirit:enumeration>Even</spirit:enumeration>
    </spirit:choice>
    <spirit:choice>
      <spirit:name>choice_list_ac75ef1e</spirit:name>
      <spirit:enumeration>Custom</spirit:enumeration>
    </spirit:choice>
    <spirit:choice>
      <spirit:name>choice_list_d4196e9f</spirit:name>
      <spirit:enumeration>110</spirit:enumeration>
      <spirit:enumeration>300</spirit:enumeration>
      <spirit:enumeration>1200</spirit:enumeration>
      <spirit:enumeration>2400</spirit:enumeration>
      <spirit:enumeration>4800</spirit:enumeration>
      <spirit:enumeration>9600</spirit:enumeration>
      <spirit:enumeration>19200</spirit:enumeration>
      <spirit:enumeration>38400</spirit:enumeration>
      <spirit:enumeration>57600</spirit:enumeration>
      <spirit:enumeration>115200</spirit:enumeration>
      <spirit:enumeration>128000</spirit:enumeration>
      <spirit:enumeration>230400</spirit:enumeration>
    </spirit:choice>
  </spirit:choices>
  <spirit:description>Generic UART (Universal Asynchronous Receiver/Transmitter) for AXI Interface</spirit:description>
  <spirit:parameters>
    <spirit:parameter>
      <spirit:name>C_DATA_BITS</spirit:name>
      <spirit:displayName>Data Bits</spirit:displayName>
      <spirit:description>The number of data bits in the serial frame.</spirit:description>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_DATA_BITS" spirit:order="1400" spirit:minimum="5" spirit:maximum="8" spirit:rangeType="long">8</spirit:value>
    </spirit:parameter>
    <spirit:parameter>
      <spirit:name>C_BAUDRATE</spirit:name>
      <spirit:displayName>Baudrate</spirit:displayName>
      <spirit:description>Baud rate of the AXI UART Lite in bits per second.</spirit:description>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_BAUDRATE" spirit:choiceRef="choice_list_d4196e9f" spirit:order="1300">115200</spirit:value>
    </spirit:parameter>
    <spirit:parameter>
      <spirit:name>C_S_AXI_ACLK_FREQ_HZ</spirit:name>
      <spirit:displayName>AXI CLK Frequency</spirit:displayName>
      <spirit:description>AXI4-Lite clock frequency range should be in between 10 to 300MHz.</spirit:description>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_S_AXI_ACLK_FREQ_HZ" spirit:order="1201">100000000</spirit:value>
    </spirit:parameter>
    <spirit:parameter>
      <spirit:name>C_S_AXI_ACLK_FREQ_HZ_d</spirit:name>
      <spirit:displayName>AXI CLK Frequency</spirit:displayName>
      <spirit:description>AXI4-Lite clock frequency range should be in between 10 to 300MHz.</spirit:description>
      <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.C_S_AXI_ACLK_FREQ_HZ_d" spirit:order="1200">100.0</spirit:value>
    </spirit:parameter>
    <spirit:parameter>
      <spirit:name>Component_Name</spirit:name>
      <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">design_1_axi_uartlite_0_0</spirit:value>
    </spirit:parameter>
    <spirit:parameter>
      <spirit:name>PARITY</spirit:name>
      <spirit:displayName>Parity</spirit:displayName>
      <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PARITY" spirit:choiceRef="choice_list_3bbfa9f1" spirit:order="1100">No_Parity</spirit:value>
    </spirit:parameter>
    <spirit:parameter>
      <spirit:name>C_USE_PARITY</spirit:name>
      <spirit:displayName>Use Parity</spirit:displayName>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_USE_PARITY" spirit:order="1101" spirit:minimum="0" spirit:maximum="1" spirit:rangeType="long">0</spirit:value>
    </spirit:parameter>
    <spirit:parameter>
      <spirit:name>C_ODD_PARITY</spirit:name>
      <spirit:displayName>Odd Parity</spirit:displayName>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_ODD_PARITY" spirit:order="1102" spirit:minimum="0" spirit:maximum="1" spirit:rangeType="long">0</spirit:value>
    </spirit:parameter>
    <spirit:parameter>
      <spirit:name>USE_BOARD_FLOW</spirit:name>
      <spirit:displayName>Generate Board based IO Constraints</spirit:displayName>
      <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.USE_BOARD_FLOW" spirit:order="1103">false</spirit:value>
    </spirit:parameter>
    <spirit:parameter>
      <spirit:name>UARTLITE_BOARD_INTERFACE</spirit:name>
      <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.UARTLITE_BOARD_INTERFACE" spirit:choiceRef="choice_list_ac75ef1e" spirit:order="1104">Custom</spirit:value>
    </spirit:parameter>
  </spirit:parameters>
  <spirit:vendorExtensions>
    <xilinx:coreExtensions>
      <xilinx:displayName>AXI Uartlite</xilinx:displayName>
      <xilinx:coreRevision>30</xilinx:coreRevision>
      <xilinx:configElementInfos>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.ACLK.ASSOCIATED_BUSIF" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.ACLK.ASSOCIATED_PORT" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.ACLK.ASSOCIATED_RESET" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.ACLK.CLK_DOMAIN" xilinx:valueSource="ip_propagated" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.ACLK.FREQ_HZ" xilinx:valueSource="ip_propagated" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.ACLK.FREQ_TOLERANCE_HZ" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.ACLK.PHASE" xilinx:valueSource="ip_propagated" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.ARESETN.POLARITY" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.INTERRUPT.PortWidth" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.INTERRUPT.SENSITIVITY" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.ADDR_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.ARUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.AWUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.BUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.CLK_DOMAIN" xilinx:valueSource="ip_propagated" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.DATA_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.FREQ_HZ" xilinx:valueSource="ip_propagated" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BRESP" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BURST" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_CACHE" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_LOCK" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_PROT" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_QOS" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_REGION" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_RRESP" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_WSTRB" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.ID_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.MAX_BURST_LENGTH" xilinx:valueSource="ip_propagated" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_READ_OUTSTANDING" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_READ_THREADS" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_OUTSTANDING" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_THREADS" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.PHASE" xilinx:valueSource="ip_propagated" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.PROTOCOL" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.READ_WRITE_MODE" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.RUSER_BITS_PER_BYTE" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.RUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.SUPPORTS_NARROW_BURST" xilinx:valueSource="ip_propagated" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.WUSER_BITS_PER_BYTE" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.WUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.UART.BOARD.ASSOCIATED_PARAM" xilinx:valuePermission="bd"/>
        <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_BAUDRATE" xilinx:valueSource="user"/>
        <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_S_AXI_ACLK_FREQ_HZ_d" xilinx:valueSource="propagated" xilinx:valuePermission="bd_and_user"/>
      </xilinx:configElementInfos>
    </xilinx:coreExtensions>
    <xilinx:packagingInfo>
      <xilinx:xilinxVersion>2022.1</xilinx:xilinxVersion>
      <xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="f14b4c6f"/>
      <xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="00000000"/>
      <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="6313e435"/>
      <xilinx:checksum xilinx:scope="ports" xilinx:value="ca2ad2a5"/>
      <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="066283f2"/>
      <xilinx:checksum xilinx:scope="parameters" xilinx:value="27618e8b"/>
    </xilinx:packagingInfo>
  </spirit:vendorExtensions>
</spirit:component>
